UALink defines an open, memory-semantic, scale-up interconnect that allows accelerators to perform load, store, and atomic operations across the fabric, not merely send messages to each other.

SNIA announced StorageAI on August 4, 2025, describing it as an open standards project for efficient data services related to AI workloads, built on industry-standard, non-proprietary, vendor-neutral approaches.

Over the past few months, the AI infrastructure conversation has taken an unmistakable turn: upward.

ESUN's charter, deliberately narrow: define open, standards-based Ethernet switching and framing for scale-up networking.

ZAM is a stacked DRAM architecture, conceptually similar to HBM but with a fundamentally different approach to how the layers are connected and how heat escapes.

In this article, I will talk about some of the recent CXL implementations, most of them geared to serve the insatiable appetite of AI compute infrastructure.

The SOCAMM memory leverages the LPDDR5X memory, which, as the name states, is a Low Power memory. However, LPDDR is a soldered-down memory leaving no room for repair and field-replaceability; thereby increasing the total cost of ownership. (TCO) SOCAMM is a screws-secured, socketed memory

Enters High Bandwidth Flash or HBF, which aims to serve as an intermediary layer between HBM and the slower NVMe SSDs. The base architectural concept remains similar to HBM.Enters High Bandwidth Flash or HBF, which aims to serve as an intermediary layer between HBM and the slower NVMe SSDs. The base architectural concept remains similar to HBM.